For list of our current offering start from our Home page or see our SiteMap.

Click here for NMC Pod Layout Diagram.
| Device | Specifications |
| R1 | cisco 3640 (R4700)
processor (revision 0x00) with 105472K/25600K
bytes of memory. |
| R2 | cisco 3640 (R4700)
processor (revision 0x00) with 105472K/25600K
bytes of memory. Processor board ID 24416904 R4700 CPU at 100Mhz, Implementation 33, Rev 1.0 Bridging software. X.25 software, Version 3.0.0. SuperLAT software (copyright 1990 by Meridian Technology Corp). TN3270 Emulation software. Basic Rate ISDN software, Version 1.1. 1 FastEthernet/IEEE 802.3 interface(s) 2 Serial network interface(s) DRAM configuration is 64 bits wide with parity disabled. 125K bytes of non-volatile configuration memory. 32768K bytes of processor board System flash (Read/Write) |
| R3 | cisco 2621 (MPC860)
processor (revision 0x100) with 59392K/6144K
bytes of memory. |
| R4 | cisco 2621 (MPC860)
processor (revision 0x102) with 59392K/6144K
bytes of memory. Processor board ID JAD0501063S (3171491491) M860 processor: part number 0, mask 49 Bridging software. X.25 software, Version 3.0.0. TN3270 Emulation software. 2 FastEthernet/IEEE 802.3 interface(s) 2 Serial network interface(s) 32K bytes of non-volatile configuration memory. 16384K bytes of processor board System flash (Read/Write) |
| R5 | cisco 3640 (R4700)
processor (revision 0x00) with 105472K/25600K
bytes of memory. Processor board ID 17197023 R4700 CPU at 100Mhz, Implementation 33, Rev 1.0 Bridging software. X.25 software, Version 3.0.0. SuperLAT software (copyright 1990 by Meridian Technology Corp). TN3270 Emulation software. Primary Rate ISDN software, Version 1.1. 1 FastEthernet/IEEE 802.3 interface(s) 2 Serial network interface(s) DRAM configuration is 64 bits wide with parity disabled. 125K bytes of non-volatile configuration memory. 32768K bytes of processor board System flash (Read/Write) |
| R6 | cisco 3640 (R4700)
processor (revision 0x00) with 105472K/25600K
bytes of memory. Processor board ID 17634240 R4700 CPU at 100Mhz, Implementation 33, Rev 1.0 Bridging software. X.25 software, Version 3.0.0. SuperLAT software (copyright 1990 by Meridian Technology Corp). TN3270 Emulation software. 1 FastEthernet/IEEE 802.3 interface(s) DRAM configuration is 64 bits wide with parity disabled. 125K bytes of non-volatile configuration memory. 32768K bytes of processor board System flash (Read/Write) |
| CAT1 | cisco WS-C3550-24 (PowerPC)
processor (revision D0) with 65526K/8192K bytes
of memory. Last reset from warm-reset Bridging software. Running Layer2/3 Switching Image Ethernet-controller 1 has 12 Fast Ethernet/IEEE 802.3 interfaces Ethernet-controller 2 has 12 Fast Ethernet/IEEE 802.3 interfaces Ethernet-controller 3 has 1 Gigabit Ethernet/IEEE 802.3 interface Ethernet-controller 4 has 1 Gigabit Ethernet/IEEE 802.3 interface 24 FastEthernet/IEEE 802.3 interface(s) 2 Gigabit Ethernet/IEEE 802.3 interface(s) |
| CAT2 | cisco WS-C3550-24
(PowerPC) processor (revision D0) with
65526K/8192K bytes of memory. Last reset from warm-reset Bridging software. Running Layer2/3 Switching Image Ethernet-controller 1 has 12 Fast Ethernet/IEEE 802.3 interfaces Ethernet-controller 2 has 12 Fast Ethernet/IEEE 802.3 interfaces Ethernet-controller 3 has 1 Gigabit Ethernet/IEEE 802.3 interface Ethernet-controller 4 has 1 Gigabit Ethernet/IEEE 802.3 interface 24 FastEthernet/IEEE 802.3 interface(s) 2 Gigabit Ethernet/IEEE 802.3 interface(s) |
| CAT3 |
cisco WS-C3560-24TS (PowerPC405) processor (revision D0) with 118784K/12280K bytes of memory. Processor board ID CAT1005N3EY 1 Virtual Ethernet interface 24 FastEthernet interfaces 2 Gigabit Ethernet interfaces |
| CAT4 |
cisco WS-C3560-24TS (PowerPC405) processor (revision D0) with 118784K/12280K bytes of memory. Processor board ID CAT1005N3EY 1 Virtual Ethernet interface 24 FastEthernet interfaces 2 Gigabit Ethernet interfaces |

